DIMES Home Page
DIMES - Delaware Iterative Multiprocessor Emulation System
News
- The DIMES team is expanding!
Past news
- Nov 8-11, 2004 :
SC2004 - In Pittsburgh,
we successfully had our exhibit booth and presented our activity
on cellular architecture researches including DIMES.
- Nov 18-20, 2003 :
SC2003 - We presented our research activity on DIMES at our
EXHIBIT BOOTH
at SC2003 in Phoenix.
Introduction - What is DIMES?
DIMES is an emulation approach optimized to support the development of
multiprocessor systems. It is a cost-effective system architecture using
FPGAs and memory chips to emulate a multiprocessor design. The key benefit
of DIMES is to bring the cost of multiprocessor emulation within the reach
of software developers in the early stages of multiprocessor product
development, and within the reach of researchers exploring new system
architectures and implementation techniques.
Using DIMES tradeoffs can be made between emulation hardware cost and number
of instructions emulated per cycle. The key concept in DIMES is to store the
states of all the multiprocessors in memory, and process them in sequence
using a small number of copies of the processor logic. The amount of FPGA
resources for logic emulation can thus be greatly reduced, while processor
states are stored in much cheaper memory resources. If the multiprocessor
logic is fully instantiated, the entire multiprocessor is emulated when the
FPGA logic is exercised for one cycle. In DIMES, assuming only a single copy
of the processor logic is instantiated, one cycle of the entire
multiprocessor is emulated when the FPGA logic for a single processor is
exercised for a number of cycles equal to the number of processors in the
system.
We are using an off-the-shelf FPGA board as a DIMES prototype, before
developing a customized board design optimized for the DIMES approach. Our
first emulation target is the IBM Blue Gene/Cyclcops multiprocessor
architecture. The Cyclops architecture employs on-chip interconnection
networks, on-chip SRAM blocks, multi-port register files as well as
processor logic, and provides a rich variety of hardware structures to
verify DIMES emulation concepts and techniques. We have emulated different
configurations of Cyclops on the DIMES prototype board. These Cyclops
emulators have been useful in hardware debug, as well as in applications and
system software development.
People in the DIMES project
- Supervisor
- Technical advisor
- DIMES Hardware team
- Ted Taikyeong Jeong
- Fei Chen
- Dimitrij Krepis
- Divya Parthasarathi
- Chrissie Vicker
- Michael Bodnar
- Yuhei Hayashi
- Ming-Jay Shiao
- Kelly Livingston
- Hirofumi Sakane
- DIMES Software team
- Juan del Cuvillo
- Alban Douillet
- Ziang Hu
- Joseph Bryant Manzano Franco
- Weirong Zhu
- Yingping Zhang
- Geoff Gerfin
- Brice Dobry
- Former members
- Andres Marquez
- Levent Yakay
- Vishal Karna
- Jason McGuiness
- Robert Klosiewicz
Related Links to DIMES/Cyclops
Organization / Cooperation
Blue Gene Information by IBM
CAPSL
Conference
SC2004
SC2003
FPT'03
FPGA System
Xilinx
Virtex-II handbook (Xilinx)
Mentor Graphics
Mentor Graphics Higher Education Program
Micron
Alpha Data
Nallatech
Annapolis Micro Systems
Interesting Info / Work
A talk on Cyclops (at Polytechnic University)
Poster on M3T (by UIUC; pdf file)
Research on Blue Gene Software by UIUC
This project is supprted by DOE and NSF.
We have been adviced by IBM T.J. Watson Research Center and ET International
Inc in technical issues.
Contact: sakane@capsl.udel.edu
Last modified: Sat Mar 26 07:30:38 EST 2005