Resume

Table of Contents

 

Curricula Vitae

  Academic Experience
  Education
  Professional Experience
  Current Research Areas
  National Recognition
  Institutional Recognition

Section A: Teaching and Research Supervision

   A.1 Teaching
    A.1.a Teaching at University of Delaware
    A.1.b Other Teaching Experience

  A.2. Research Supervision

Section B: Scholarship

   B.1: Research Activity and Interests

  B.2: List of Research Contributions
    Refereed Journal Publications
    Publications in Refereed Conference Proceedings(Last Six Years Only)
    Monographs, Books and Book Chapters

  B.3 Research Significance

  B.4 Research Support

Section C: Services

   C.1 University Activities and Services

  C.2 Professional Services

CURRICULUM VITAE

OFFICE ADDRESS:

Department of Electrical Engineering
104 Evans Hall
University of Delaware
Newark, DE 19716
Tel: 302-831-8218
Fax: 302-831-4316
ggao@eecis.udel.edu
ggao@capsl.udel.edu

EDUCATION

Ph.D Degree in Electrical Engineering and Computer Science
Massachusetts Institutes of Technology, August 1986.
Member of Computational Structures Group at Laboratory of Computer Science, MIT, June 1982 to August 1986.

Master Degree in Electrical Engineering and Computer Science
Massachusetts Institutes of Technology, June 1982.

BS in Electrical Engineering
Tsinghua University, Beijing.

PROFESSIONAL EXPERIENCE

University of Delaware, Newark, DE.
Professor, Department of Electrical and Computer Engineering, Sept. 99-present
Associate Professor, Department of Electrical and Computer Engineering, Sept. 96-present
Founder and a leader of the Computer Architectures and Parallel Systems Laboratory (CAPSL)

McGill University, Montreal, Canada
Associate Professor, School of Computer Science, June'92-August,1996
Assistant Professor, School of Computer Science, Aug.'87-June'92
Founder and a leader of the Advanced Compilers, Architectures and Parallel Systems Group (ACAPS) at McGILL since 1988.

Philips Research Laboratories
Sept. 1986 - June 1987
Briarcliff Manor, NY, USA
Senior member of research staff of the Computer Architecture and Programming Systems Group. Played a major role in founding a multiprocessor system project, and research in parallelizing compilers.

Massachusetts Institutes of Technology
June 1980 - Aug. 1986
Member of the Computational Structures Group at the Laboratory of Computer Science, MIT. Participated in the MIT Static Dataflow Architecture Project and other projects.

Proposed a novel methodology of organizing array operations to exploit the fine-grain parallelism of dataflow computation models. Developed a unique pipelined code mapping scheme for dataflow machines (later known as dataflow software pipelining).

Center Of Advanced Studies, IBM Toronto Lab
Aug 1993 - June 1994
Visiting scientist with a NSERC Senior Industrial Fellowship.

CURRENT RESEARCH AREAS:

- Computer Architecture and Systems
- Parallel and Distributed Systems
- Optimizing and Parallelizing Compilers, Parallel Programming
- VLSI and Application-Specific System Design

PROFESSIONAL MEMBERSHIP
- a Senior Member of IEEE, Member of ACM, ACM-SIGARCH, ACM-SIGPLAN.
- a Distinguished Visitor of IEEE Computer Society.

NATIONAL RECOGNITION:

Conference Committee Chairmanship

  • Program Chairman of the 1994 ACM SIGARCH, International Conference on parallel Architectures and Compilation Techniques (PACT '94), Aug/. 1984. Montreal, Canada, co-sponsored by IFIP and in association with ACM SIGPLAN, IEEE TCCA (Technical Committee on Computer Architecture) and IEEE TCPP (Technical Committee on Parallel Processing).
  • General Co-Chair of the 1998 International Conference on Parallel Architectures and Compilation Techniques (PACT '98), Oct. 1998, Paris, France., co-sponsored by IFIP and IEEE Computer Society
  • Chair of the Third Workshop on Petaflop Computing, Feb. 1999. Annapolis, MD.
  • Co-Chair of the Multithreaded Architecture Workshop, in Conjunction to HPCA99, Orlando, Florida, Jan. 1999.
  • Co-Chair of the Compiler and Architecture Support for Embedded Systems (CASES98), Washington D.C., Oct. 1998.

Journal Editorialship

  • Elected to the Editorial Board of IEEE Transactions on Computers (1998 -)
  • Elected to the Editorial Board of IEEE Concurrency Journal (1997 -)
  • Joined the Editorial Board of the Journal on Programming Languages in Jan. 1996, and subsequently became one of the two Co-Editors of the journal.
  • I have been a Guest Editor for the Special Issue on Dataflow and Multithreaded Computers, Journal of Parallel and Distributed Computing, Academic Press, June, 1993.
Invited Seminars and Distinguished Seminars

I have given seminars in many industrial and academic organizations: IBMT.J. Watson Research Center, IBM Toronto Lab, AT&T Bell Laboratories, BNR, HP Labs, SGI, DEC, NRL(Navy Research Lab.), MIT, Stanford, UC Berkeley, NYU, Cornell U., University of Victoria are just named a few.