CURRICULUM VITAE

NAME: Guang R. Gao

OFFICE ADDRESS:

Department of Electrical Engineering

104 Evans Hall

University of Delaware

Newark, DE 19716

Tel: 302-831-8218

Fax: 302-831-4316

ggao@eecis.udel.edu

EDUCATION

Ph.D Electrical Engineering and Computer Science

Massachusetts Institutes of Technology, August 1986.

Member of Computational Structures Group at Laboratory of Computer Science, MIT,

June 1982 to August 1986.

Master Electrical Engineering and Computer Science

Massachusetts Institutes of Technology, June 1982.

BS Electrical Engineering

Tsinghua University, Beijing.

PROFESSIONAL EXPERIENCE

University of Delaware

Newark, DE.

Professor, Department of Electrical and Computer Engineering

Founder and leader of the Computer Architectures and Parallel Systems Laboratory (CAPSL)

McGill University

Montreal, Canada

Associate Professor, School of Computer Science, June'92-August,1996

Assistant Professor, School of Computer Science, Aug.'87-June'92

Founder and leader of the Advanced Compilers, Architectures and Parallel Systems Group (ACAPS) at McGill since 1988.

Philips Research Laboratories

Sept. 1986 – June 1987

Briarcliff Manor, NY, USA

Senior member of research staff of the Computer Architecture and Programming Systems Group. Played a major role in founding a multiprocessor system project, and research in parallelizing compilers.

Massachusetts Institutes of Technology

June 1980 - Aug. 1986

Member of the Computational Structures Group at the Laboratory of Computer Science, MIT. Participated in the MIT Static Dataflow Architecture Project and other projects.

Proposed a novel methodology of organizing array operations to exploit the fine-grain parallelism of dataflow computation models. Developed a unique pipelined code mapping scheme for dataflow machines (later known as dataflow software pipelining).

Center Of Advanced Studies, IBM Toronto Lab

Aug 1993 – June 1994

Visiting scientist with a NSERC Senior Industrial Fellowship.

CURRENT RESEARCH AREAS:

Computer Architecture and Systems

Parallel and Distributed Systems

Optimizing and Parallelizing Compilers, Parallel Programming

VLSI and Application-Specific System Design

PROFESSIONAL MEMBERSHIP

I am a Senior Member of IEEE, Member of ACM, ACM-SIGARCH, ACM-SIGPLAN.

I am currently a Distinguished Visitor of IEEE Computer Society.

NATIONAL RECOGNITION:

· IEEE Computer Society Distinguished Visitor, 1998-2001:

· IEEE, Senior Member:

· Program Committee Membership of Well Established International Conferences:

- IEEE International Symposium on Computer Architecture (HPCA-95, HPCA-99, HPCA-00)

- ACM Symposium on Programming Language Design and Implementation (PLDI-98)

- ACM International Conference on Supercomputing (ICS-95)

- ACM/IEEE International Symposium on Microarchitectures (MICRO-95, 96, 97)

- International Parallel Processing Symposium (IPPS-95)

- International Parallel and Distributed Processing Symposium (IPDPS-00)

- International Conference on Parallel Architectures and Compilation Techniques (PACT-94,95,96,97,98,99,00)

- International Conference on Algorithms And Architectures for Parallel Processing (ICAPP-95)

- Parallel Architecture and Language Europe (PARLE-91,92,93,94,95)

- International Conference on Parallel Processing (EURO-PAR-95,96)

- Working Conference on Massively Parallel Programming Models (MPPM-93,95,97)

- High Performance Computing Symposium (HPCS-95, 96, 98), Canada.

- International Conference on Compiler Construction (CC-98,99,00,01), Europe.

- International Symposium on High Performance Computing (ISHPC99), Japan.

· Conference Committee Chairmanship:

- Program Chairman of the 1994 ACM SIGARCH, International Conference on parallel Architectures and Compilation Techniques (PACT '94), Aug. 1994. Montreal, Canada, co-sponsored by IFIP and in association with ACM SIGPLAN, IEEE TCCA (Technical Committee on Computer Architecture) and IEEE TCPP (Technical Committee on Parallel Processing).

- General Co-Chair of the 1998 International Conference on Parallel Architectures and Compilation Techniques (PACT '98), Oct. 1998, Paris, France., co-sponsored by IFIP and IEEE Computer Society

- Chair of the Third Workshop on Petaflop Computing, Feb. 1999. Annapolis, MD.

- Co-Chair of the Multithreaded Architecture Workshop, in Conjunction to HPCA99, Orlando, Florida, Jan. 1999.

- Co-Chair of the Compiler and Architecture Support for Embedded Systems (CASES98,99), Washington D.C., Oct. 1998, 1999.

· Journal Editorship:

- Elected to the Editorial Board of IEEE Transactions on Computers (1998 -)

- Elected to the Editorial Board of IEEE Concurrency Journal (1997 -)

- Joined the Editorial Board of the Journal on Programming Languages (1996-97), and subsequently became one of the two Co-Editors of the journal (1997-99).

- A Guest Editor for the Special Issue on Dataflow and Multithreaded Computers, Journal of Parallel and Distributed Computing, Academic Press, June, 1993, and special issue of Multithreaded Architectures, IEEE Trans. 1999.

· Invited Seminars and Distinguished Seminars:

A presented seminar speaker in many industrial and academic organizations: IBMT.J. Watson Research Center, IBM Toronto Lab, AT&T Bell Laboratories, BNR, HP Labs, SGI, DEC, NRL(Navy Research Lab.), MIT, Stanford, UC Berkeley, NYU, Cornell U., University of Victoria, and many in Europe, Japan, China and Brazil.